1. Field of the Invention
The present invention relates generally to semiconductor fabrication methods and, more particularly, to etching techniques for forming high-aspect-ratio trench structures.
2. Description of Related Art
As integrated circuit device sizes become smaller with critical dimensions less than 50 nm, fabrication of arrays of high-aspect-ratio trenches using wet strip processes can result in distortion, e.g., bending, of trench boundaries, even to the point, not so uncommonly, of collapse. Post-etch investigation has confirmed that such bending typically does not occur prior to, bur rather occurs at the time of, wet-strip processing during prior art manufacturing. This observation tends to confirm that the bending is caused by capillary forces on trench side walls that occur during the wet strip processing. Eliminating wet strips from the fabrication process, however, is not a viable or attractive solution to the bending/collapse problem, as wet strips provide a powerful tool, e.g., for removal of polymer residue.
High-aspect-ratio trenches also may be prone to bowing, producing a profile that can create problems when trenches are filled-in with material. Polysilicon is a material widely used to fill in such trenches. The bowing may lead to formation, e.g., of voids in the fill-in, which naturally can materially and adversely effect the operation of a given integrated circuit, thereby reducing yields and increasing manufacturing cost.
A need thus exists in the prior art for a method of fabricating collapse-free trenches. A further need exists for avoiding bowing in the formation of trench profiles.